1. Technical Field
The present invention relates to a semiconductor device having an insulated gate bipolar transistor (IGBT) and a method of manufacturing the semiconductor device.
2. Related Art
An example of a structure of a semiconductor device having an IGBT includes, for example, a structure disclosed in Japanese Unexamined Patent Publication No. H05-283622. This structure is a structure in which a drain diffusion layer of a lateral double-diffused NMOS transistor (LDNMOS) is converted to a reverse conductivity type. That is, as shown in FIG. 11, an n+ diffusion layer 410 serving as an emitter and a p+ diffusion layer 412 serving as a back gate are disposed in parallel to each other in a p− substrate 400, and they are connected to a common emitter electrode. In addition, an n− drift layer 430 and a p+ diffusion layer 432 serving as a collector are provided in the p− substrate 400. A collector electrode 434 is connected to the p+ diffusion layer 432.
However, the IGBT shown in FIG. 11 has a problem that the turnoff time is long. This is for the following reason. That is, the n− drift layer 430 shown in FIG. 11 has a low impurity concentration, and is in a floating state. For this reason, when a large amount of minority carriers (particularly, holes) are implanted into the n− drift layer 430 from the p+ diffusion layer 432 at the time of turnoff, the extinction of these carriers depends on the recombination with electrons existing in the n− drift layer 430.
On the other hand, Japanese Unexamined Patent Publication No. H05-283622 also discloses a semiconductor device having a structure shown in FIG. 12. This semiconductor device is configured such that in the semiconductor device shown in FIG. 11, an n+ diffusion layer 433 is provided at a position short-circuited to the p+ diffusion layer 432, and the n+ diffusion layer 433 and the p+ diffusion layer 432 are short-circuited to each other by the collector electrode 434. According to this structure, a large amount of minority carriers generated at the time of turnoff can be extracted from the collector electrode 434 through the n+ diffusion layer 433. Therefore, the turnoff time can be shortened.
The following analysis is performed by the present inventor. In the semiconductor device shown in FIG. 12, since the n+ diffusion layer 433 is disposed at a position adjacent to the p+ diffusion layer 432, it is difficult to operate a PNP bipolar transistor included in the IGBT. In detail, in order to operate this bipolar transistor, the product of the resistance R1 of the n− drift layer 430 located under the p+ diffusion layer 432 and the electronic current I1 flowing through the n− drift layer 430 is required to be set to be equal to or more than the built-in potential (for example, about 0.7 V) of a pn diode including the p+ diffusion layer 432 and the n− drift layer 430. However, in the structure shown in FIG. 12, since the n+ diffusion layer 433 is disposed adjacent to the p+ diffusion layer 432, R1 is reduced, and thus it is difficult for the product thereof to exceed the built-in potential. In this case, in the IGBT, since the bipolar transistor is not operated, and only the MOS transistor is operated, the current capability is remarkably reduced.